◈ computers mapVol 1 · Ch 11/19
How Computers Work from the transistor up · chapter 11

11The Lookup Table & ROM

Last chapter you ran a real arithmetic program by hand. You set an address, pulsed a clock, enabled a driver, read the bus, and went around again. Two things nagged. First, the machine never showed you its answer. The result sat in a register as a byte, and you had to decode it in your head. Second, the machine couldn't hold its own instructions. You were the program, punching in each step. Both problems have the same answer, and it's a lovely one: a table baked into wires. A seven-segment display feels like it needs cleverness. Surely something has to know that a "4" lights these bars and not those. It doesn't. Each bar is one boolean equation, so the whole display is a table. Here's the bet for this chapter. By the end you will have built a thing you have owned your whole life, a thing with a name you've heard since you were a kid — ROM — and you will not have used one idea you didn't already have. You own the parts already. A decoder, from the RAM chapter. An OR gate, from long before that. What you don't own yet is what happens when you put them together, and it is not what you would guess from the parts. Build it once here, on a display, and you'll have quietly built the thing that will soon be the brain of the whole CPU.

01The bars that show the answer

Start with the thing itself. A seven-segment display is seven little bars arranged in a figure-eight: a top, two shoulders, a waist, two hips, and a foot. Light the right subset and a numeral appears. That's the whole device. There's no chip inside and no intelligence, just seven bars you can switch on and off on their own. Pick a digit below and watch which bars it calls for.

a b c d e f g the 7-bit code stored for this digit a 1 b 1 c 1 d 1 e 1 f 1 g 1 address 8 → lights up stored word (a…g) 1111111 seven of seven bars lit
digit 8 lights every bar — the whole figure-eight
Nothing here draws a numeral. Each digit is just an entry in a table: a 7-bit word that flips seven bars on or off. Pick another and watch a different subset light.
Fig 1. A seven-segment display never draws a numeral — it selects one. Seven bars (ag) sit there permanently; a stored 7-bit code decides which light and which stay dark. Pick any digit 0–9 and watch its own subset switch on: a 1 in the code lights that bar, a 0 leaves it off. That table — digit in, pattern out — is a lookup table, and burning it into hardware so it never forgets is exactly what a ROM is.

Notice there's nothing mysterious happening. The "4" isn't drawn, it's selected. Turn on the two shoulders, the waist, and the lower-right hip — four bars — leave the rest dark, and your eye does the rest. So the real job isn't drawing at all. It's answering seven small yes-or-no questions, one per bar: for this number, are you on?

So let's isolate one bar and stare at it. Take the top bar and call it segment a. The trade names all seven, and the labelling costs you nothing to learn because the figure always shows it: start at a, the top, and walk clockwise — b is the upper-right, c the lower-right, d the foot, e the lower-left, f the upper-left — and g is the waist across the middle. Now, as you walk the digits 0 through 9, that single bar blinks on and off on its own private schedule: on for 0, off for 1, on for 2, on for 3, off for 4… It doesn't care what the other six are doing. It is its own 1-or-0.

bar a segment a — its own schedule, 0 to 9 0 ON the top bar lights for a 0
Digit 0 → the top bar (a) is ON — it lights.
Seven bars make a digit — but each bar is its own yes-or-no. Here the top bar (segment a) is lifted out in gold; the other six are dimmed to ghosts. Step through 0–9 (or hit walk) and watch only that bar decide. It follows no rhythm but its own: on for 0, off for 1, on again for 2 and 3, off for 4… dark for exactly the digits 1 and 4, lit for the other eight. That private on/off schedule is one column of the lookup table — one wire, one bit — and the ROM stores seven such columns side by side.

And that is the crack the whole chapter pours through. A display that seemed to need a designer's touch is really seven separate switches. Each one is a function of the number coming in. We don't have to be clever about "the shape of a 4." For each bar we just answer one honest question — which numbers turn you on? — and wire that answer in gates. Seven questions, seven little circuits, done.

02One number in, sixteen lines out

Here's the snag we have to clear first. The number arriving is a nibble: four bits, 0000 to 1111. But segment a doesn't want the raw bits. It wants to know which digit this is, so it can ask "am I in that digit's list?" So we need to turn one 4-bit code into one wire per digit — sixteen wires, of which exactly one is ever hot. You've built this before, in the RAM chapter. It's the decoder.

Except you don't need a decoder, and you should hear the other road named before we take this one. You could sit down with segment a's list and the four raw bits, and grind it into a handful of AND, OR and NOT gates that light the top bar and nothing else. It works. Real chips have done exactly that for decades. And sixteen AND gates to light one bar should make you wince. So wince — then try the next one. Now do segment g: a fresh puzzle, from scratch. Now do a table you haven't met yet — hex letters, a keyboard map, squares. Fresh puzzle again, every time. The cleverness never transfers. That's the trade this whole chapter turns on. Buy the decoder once, get one wire per input code, and every table after that is only a question of which wires you tap. You are spending gates to buy the right to stop thinking.

Recall the mechanism, because we lean on it hard. Each address bit is fanned out two ways: straight, and through a NOT into an inverted rail (the Ā lines). Then one AND gate per output taps exactly the right mix of straight and inverted rails, so it fires for one code and no other. Here's the 2-to-4 version, with the shared inverted rails laid bare.

A1 A0 = 0 0 A1 0 A0 0 A1 A̅1 A0 A̅0 0 1 0 1 four AND gates · one-hot select · exactly one line goes high
Set the address here, or click the A1 / A0 pads in the figure. Each AND gate is pre-wired to watch one code — via the straight or the inverted (A̅) copy of each bit.
A1 A0 = 00 → gate 00 fires → register 0 selected.
Predict first: for the address 10, which single gate sees 1·1 on both inputs — and why do the other three each catch a 0?
A 2-to-4 decoder, built from nothing but AND gates. Two address bits enter on the left; each is copied straight and, through a NOT gate, inverted (the A̅ lines) — giving four signal lines. Each AND gate is hard-wired to one code: gate 00 watches A̅1·A̅0, gate 11 watches A1·A0, and so on. For any address, exactly one gate finds both its inputs high and fires — a one-hot select line that switches on that register alone.

Two things carry straight over. First, one inverter per input bit feeds every AND gate that needs the low version. You pay for the rails once and share them. Second, the outputs are one-hot: for any input, exactly one line is high, because only one AND term can be satisfied at a time. Now scale it. Slide the decoder wider and watch the arithmetic march in lockstep: one more address bit, twice as many output lines.

address bits (n) decoder output lines (2ⁿ) 3 → 8 one-hot decoder
Nothing was special about four. Drag decoder width and the address bits and the output lines double together — always exactly one line hot. Click a bit to flip it, or sweep the address.
1 hot · 7 cold
n = 3 bits  →  23 = 8 lines  ·  address 101₂ = 5  →  line 5 is the one that fires
one address in, one line out — one-hot
Fig 4. The same machine at every size. Slide decoder width from n=1 to n=5 and three numbers move as one: the stack of address bits grows by one, the count of output lines doubles to 2ⁿ, and the decoder's fan-out doubles with it. Flip a bit or sweep the address and watch the single hot line walk the stack — never two lit, never none. Address width, slot count, and fan-out were never three facts to memorize; they're one number, n, wearing three hats.

Take it to four input bits and you get 2⁴ = 16 output lines, one for every digit code, 0 through 15. Feed in 0100 and line 4 goes hot while the other fifteen stay cold. We now have exactly what segment a asked for: a dedicated wire that means "the number is 4," another that means "the number is 7," and so on. The nibble has become sixteen labelled digit-lines.

03Every bar is an OR

Back to segment a. Write down its honest answer: the list of digits that light it. Walking 0–9, the top bar is on for 0, 2, 3, 5, 6, 7, 8, 9, and dark only for 1 and 4. That list is segment a's truth table, a function from the 4-bit code to a single bit. Here it is, all sixteen rows, nothing hidden.

segment a ↓ shows: 0 the 4-bit input code — click a bit to flip it 0 b3 8s 0 b2 4s 0 b1 2s 0 b0 1s = 0 (0x0) segment a 1 a = 1
code 0 (0000) → digit 0 lights the top bar → segment a = 1
Segment a is on for 0, 2, 3, 5, 6, 7, 8, 9 · off for 1 and 4 · codes 10–15 aren't digits — nothing has decided them yet, so they sit at 0 for now.
the full lookup table — all 16 codes
Fig 5. Segment a — the top bar of the display — is nothing more than a boolean function of the 4-bit code. Flip the input bits (or step through the codes) and read the one output bit it produces. It's on for 0, 2, 3, 5, 6, 7, 8, 9 and off for just 1 and 4; the six codes past 9 aren't decimal digits, so nothing yet decides them; we leave them 0 here and wire them as hex A–F later. That single column of sixteen 0s and 1s is segment a — one word in the lookup table, decided in advance and read straight out.

Now read that table as an instruction for wiring. Segment a should be 1 whenever the number is 0 or 2 or 3 or 5 or…, and you already have a wire for each of those digits. "This or that or that" points straight at one gate. Let's re-meet it before we lean on it.

OR 0 A 0 B click to flip 0 output · off truth table A B A OR B the same fact, three ways logical-or · “either one” 0 ∨ 0 = 0 the bigger bit · max(a, b) max(0,0)=0 set union · {} ∪ {} → empty
The OR gate is the mirror of AND: it outputs 1 when either input is 1 — it only stays 0 when both are 0. Toggle the two inputs and watch the lamp.
0 OR 0 → 0 · both off, so the light stays dark
Fig. The OR gate — “either.” Flip the two inputs (click the pads or pick a row): the lamp lights the instant either A or B is 1, and goes dark only in the single case where both are 0. That one fact wears three costumes at once — it's logical-or (either one), it's max(a, b) (the larger of the two bits), and it's set union (an element is in A ∪ B if it's in either set). It is the exact mirror of AND: where AND demanded both, OR is satisfied by one.

An OR fires if any of its inputs is high. So the recipe for segment a writes itself: feed the OR the eight digit-lines {0,2,3,5,6,7,8,9}, skip lines 1 and 4, and the output is exactly the bar. When the "4" line is the hot one, none of segment a's eight inputs is live. The OR sits at 0, which is ground, a clean logical zero. The top bar stays dark, which is precisely what a "4" needs.

Drawing that as a fat eight-input OR gate, and then six more beside it, is a mess on the page and wasteful in silicon. So here is the same OR built in wire instead of in gates. Run each digit-line across the page and call it a word-line, because going hot is what selects one whole row of the table. Run one wire down the page per segment and call it a bit-line, because it carries one bit of the answer out. Every place they cross, you have exactly one choice: connect, or don't. Connect through a diode, so current can only shove from the hot word-line onto the bit-line and never backwash into the other rows. Then a hot word-line pulls up every bit-line it's dotted to, and no others. And when none of a bit-line's dotted rows is hot, a pull-down resistor ties it to ground, so it rests at 0 — the same clean zero we just named. That grid of crossings is the OR. Same logic, no gates.

digit-lines · one is hot bit-line for segment a pull-down holds 0 V no diode 0 V segment a (other 6 segments shown dim — each has its own bit-line)
line 3 is on a's list — its diode pulls the bit-line to 5 V, segment a lights
diode present → digit lights a bare crossing → no path conducting now
Segment a fires for 0 2 3 5 6 7 8 9 — the eight lines with a diode on this bit-line. Pick 4 (or 1): its line goes hot, but there's no diode to grab the bit-line, so the pull-down keeps it at ground and the bar stays dark.
Segment a is nothing but an OR of the digit-lines that need it — wired here as a diode-ROM row: ten word-lines cross one bit-line, with a diode dropped at the crossing for exactly {0, 2, 3, 5, 6, 7, 8, 9}. Make a line hot and, if it has a diode, current floods the bit-line and the top bar lights. Choose 4 (or 1): the line goes hot but meets a bare crossing — no diode, no path — so the pull-down resistor keeps the bit-line pinned at ground and the bar stays dark. That single missing diode is the whole reason a 4 has no top.

And here's the part that makes it a machine rather than one clever gate: every bar plays the same game on the same sixteen wires. Segment g, the middle waist, has its own list (on for 2,3,4,5,6,8,9; off for 0,1,7). So it's just a different OR tapping a different subset of the exact same decoder lines. Seven bars, seven ORs, one shared decoder feeding them all.

16 decoder lines — exactly one is HOT OR for segment a — taps the lines gold-marked below OR for segment g — a DIFFERENT subset of the same lines
line 8  ·  addr 1000  ·  digit 8
segment a — ON
segment g — ON

Same 16 wires. Two readers. Each OR fires only when the hot line sits on one of its taps — so a and g disagree, line by line. That grid of taps is the ROM.

A decoder lights exactly one of 16 lines; each display segment is just an OR gate wired to its own handful of those lines. Segment a and segment g read the same bus but tap different subsets — g fires for 2,3,4,5,6,8,9 (and A,b,d,E,F), a fires for a different set. Slide the hot line and watch the two ORs disagree. That matrix of taps — decoder rows × OR columns — is exactly what a ROM stores.

Sit with the shape for a second, because it's the shape of everything that follows. A bank of one-hot lines comes down from the decoder. A grid of ORs reaches across them, each OR picking off the lines it cares about. That grid — a decoder on one axis, ORs on the other — is the whole story. We'll name it properly in a moment.

Before we name it, though, make a prediction — this is the one place in the chapter where guessing first is worth more than reading on. Say you want this exact box to drive a completely different table: which key was pressed, or the square of a nibble, or the hex letters. Stop and decide what has to change inside the machine. Here is the honest answer: nothing. Not the decoder — it only ever says which code came in. Not one OR — an OR has no idea what it's tapping. Not a single gate anywhere. The only thing that changes is which crossings carry a dot. Sit with that, because it's the whole chapter. If the gates are identical for every table, then the gates are not the thing that knows anything. The dots are. The decoder and the ORs are furniture; the dot pattern is the only thing in the box carrying information. Which means you have not built a circuit that works out digits. You've built a circuit that fetches, and the digits are its contents.

04The display decoder, whole

Let's run one number all the way through, slowly, so no step is magic. Feed in 0100. The inverted rails set up, the AND gates resolve, and line 4 goes hot — only line 4. That single hot wire fans into the OR grid. Each segment's OR checks whether line 4 is on its list. The bars that say yes light, the rest stay at ground, and a "4" appears. Step it beat by beat.

NIBBLE IN INVERTED RAILS DECODE · AND OR ARRAY · ROM THE BARS b3 0 b2 1 b1 0 b0 0 0100 = 4 b3 b3' 0 1 b2 b2' 1 0 b1 b1' 0 1 b0 b0' 0 1 & line 3 line 5 line 4 · 0100 ◄ one hot a b c d e f g 0 1 1 0 0 1 1 each column = OR of the lines that light it reads: 4
beat 1 / 6 · nibble in
0100 arrives — b3 b2 b1 b0 = 0 1 0 0
One address, walked slowly: rails invert, one AND fires, the OR array fans out, the bars spell it.
Fig 9. The whole ROM read of one address, 0100, walked one beat at a time. Step forward: the nibble arrives; every bit puts both itself and its inverse on a rail; line 4's AND reaches for exactly four rails — b3'·b2·b1'·b0' — and finding all four 1, it fires. One line goes hot, and no other. That hot line crosses the OR array, and wherever the ROM was programmed with a dot — columns b, c, f, g — it pulls that segment high. The bars fan out and settle into the shape they were storing all along: 4. No arithmetic anywhere — just a wire finding the one row that was written for it.

That's the entire circuit: nibble → decoder → OR array → bars. Careful with that middle word. The trade calls this whole box a "display decoder" — it decodes a number into a picture, an older and looser use of the word than ours. The decoder in the chain is the strict one: the address decoder, the one-hot part you just built. No memory, no clock, no cleverness — just a pure combinational path from four input bits to seven output bars. It settles as fast as the gates can pass a signal. Now take the wheel. Type any nibble and watch the display draw it live.

7-segment display past 9 · don't-care row lights ROM address (the nibble) 3 = 0x3 binary 0011 stored word — segments a…g (1 = lit) a 0 b 0 c 0 d 0 e 0 f 0 g 0 rows 0–9 wired for BCD digits display shows: 3
0
b3 · 8
0
b2 · 4
1
b1 · 2
1
b0 · 1
code 3 → the ROM's digit-3 pattern → “3”
Click a bit, step, or type a nibble. Codes 0–9 are wired to draw digits; go past 9 (1010–1111) and you fall off the design into the don't-care rows.
Fig 10. There is no arithmetic here — the display decoder is a ROM, a pure lookup table. The 4-bit code you set is an address; the ROM hands back a 7-bit word (one bit per segment, 1 = lit); those bits light the bars. Combinational, instant, memoryless. Step through 0–9 and each address returns its designed digit pattern. Now push past nine — 1010 through 1111. Those rows were never designed; no decimal digit ever addresses them, so they're don't-cares holding whatever happens to be stored (here, hex A–F). That's the ROM's honesty: it doesn't compute a digit, it just returns row N — and if row N was never designed, you get whatever is sitting there.

Play past 9 and something honest happens. Codes 10101111 weren't on anyone's careful list, so the bars light in whatever pattern the wiring happens to give. They still light. The decoder built sixteen lines; only ten were ever thought about, and the other six go hot exactly like their neighbours. Those extra codes are don't-cares: real inputs we simply chose not to design for. But not-designed doesn't mean empty. Something is wired at those crossings, so something comes out — "gibberish" if nobody chose, and here we did choose: those six rows are wired as the hex letters A–F, and that's what you'll see. The circuit isn't broken. It's answering a question we never asked it. A machine like this has no concept of undefined — only of rows.

05A table in silicon

Now step back far enough to see what you actually built, because now it can have its name. Strip away the word "display." What you have is a box where a code goes in and a fixed pattern of bits comes out, and the mapping never changes. Code 4 always yields the same seven-bit word; code 7 always yields its own. That is a lookup table: not a thing that computes, but a thing that remembers an answer for every possible question. The "computation" was done once, by you, when you chose the wiring. One honest note about the grid drawn below: it's shrunk to three address bits and eight rows so the whole thing fits on a page. Yours has four bits and sixteen rows. Nothing else about it changes.

address →
= 0
ROM  ·  8 words × 7 bits  ·  burned once, at wiring time the fixed word 1111110 a,b,c,d,e,f,g — the seven segment lines
address 000 → the fixed word 1111110 → the display draws 0

Nothing here is computing the digit. The answer was decided when the chip was wired — the address just picks the shelf it sits on. Same address in, same word out, forever.

Fig 11. A read-only memory is just a wired table. The three switches form an address; a decoder lights exactly one wordline, and the fixed 7-bit word stored on that row spills straight into the display's segments. Strip the flashy word "display" and what's left is a plain input→output map: a code selects a stored pattern. No arithmetic happens at read time — the answer was burned in at wiring time. Feed the same address and you always get the same word back. That is all a lookup table is.

This is the quiet, load-bearing idea of the chapter. Any fixed input→output relationship can be a lookup table instead of a calculation — a display driver, a squaring table, a "which key was pressed" map. You trade cleverness for storage: hold the answer to every input, and you never have to work it out. And a lookup table burned permanently into gates has a name you've heard your whole life without knowing what was inside it — ROM, read-only memory. Cut one open and the "cut" is a joke, because you drew the blueprint an hour ago.

OR array · 7 output bit-lines 3→8 decoder one-hot stored word — read across the columns shows
address (flip the 3 bits — or pick a line)
line 0 hot
A ROM is nothing but a decoder feeding an OR array. Change the address, watch the decoder light exactly one word-line, and the pattern of dots wired to that line is the stored word.
A ROM sliced open is not a mysterious block of memory — it is an address decoder wired to an OR array, the very same shape as a display driver. The 3-bit address lights exactly one word-line (the decoder is one-hot); wherever that line was wired to a column, the column reads 1. The pattern of those wired dots is the stored word — here, the seven segments that spell each digit. Flip the address bits and watch a different word fall straight out of the wiring.

There it is: a ROM is an address decoder feeding an OR array. The address picks one hot word-line. The OR array reads off the bit-pattern wired into that line, and that pattern is the stored word. The seven-segment driver was a 4-bit-address, 7-bit-word ROM the entire time. You just called it a display. This should feel familiar for a deeper reason: it's almost exactly the RAM you built two chapters ago. Look at them side by side.

ADDR 00 which cell same address also steers the read mux → SEL 2 → 4 decoder word / select lines WE write-enable · 0 0 1 2 3 0000 0000 0000 0000 register file — the memory DATA-IN value to store · 0000 read mux 0000 DATA-OUT = 0
WE is low — the write pulse is gated off.
Read is live: the addressed cell flows through the mux to DATA-OUT.
You set ADDR, flip WE, and pulse write by hand. That hand — deciding what happens when — is the seed of a control unit.
The whole RAM, one block, its lines named. Two families of wire run through it. The control linesADDR, WE, and the decoder’s word-lines — carry no data at all; they only steer, deciding which cell is chosen and whether a write may happen. The datapath — the registers, the data-in bus, the register outputs, the read mux and data-out — is what actually carries the bits. Slide address and the same signal steers both the write-decoder and the read-mux; notice a write only lands when WE is high and you pulse write. Toggle control lines / datapath to see each family alone. And the thing setting ADDR, raising WE, choosing the moment to pulse — that’s you. Automate that hand and you’ve built a control unit.

Same decoder turning an address into one hot line, same array reading out the selected word. The only thing ROM removes is the write path: no data-in, no write-enable, no clocked latches. RAM's contents are set by the wiring of switchable cells you can rewrite. ROM's contents are set by the wiring of the OR array, fixed at manufacture. That shared skeleton is also why both are "random access": any address costs the same as any other, because every one takes the identical decode-then-read path. There's no winding to slot 800 past slots 1 through 799.

That claim deserves one more minute, because at block level you have to take it on trust, and at the cell you can check it. So go down to one cell. In RAM, a cell is a flip-flop, and its bit is ANDed onto the column when its word-line goes hot: the line asks, and the AND valve answers with whatever the loop is holding. Now freeze that flip-flop forever. Frozen at 0, the AND puts nothing on the column no matter which line is hot — a cell that can never contribute is indistinguishable from a missing wire. Frozen at 1, the AND passes the word-line straight through — which is just a wire from the line to the column. Either way, the flip-flop and its valve evaporate. What's left at the crossing is a dot, or nothing. That's the whole deletion: same decoder, same per-column OR, and the storage cell has collapsed into the wiring.

2→4 DECODER A1 A0
address 10 → word line 2 is hot
line 2 hot · registers 0,1,3 mask to 0 · each column’s OR passes register 2 → word 1100
Fig 14. The whole read, end to end. Pick an address: the 2→4 decoder lights exactly one word line gold and leaves the other three cold. A hot line throws open that register’s AND valves so its stored bits spill downward; every deselected register is clamped shut and masks to 0. In each bit-column a big OR merges all four rows — three zeros and one survivor — so the survivor emerges unharmed. Run that OR once per column and the entire word appears at the bottom. Click a bit-column to watch a single bit get built.

Pull any address and the cost is one decode plus one OR fan-in, whether you asked for line 0 or line 15. That flat, order-free access is what "random access" means, and both machines have it. So the names are a trap. RAM, Random Access Memory, is named for how you reach a slot. ROM, Read-Only Memory, is named for what you may do once you're there. Two different questions — so the pair never sat on one scale. ROM is random-access too. Its name just never mentions it.

06Burning it in, and showing it off

Removing the write path buys something RAM can never have. A RAM cell holds its bit in a feedback loop that only survives while the power is on. Cut the supply and the loop collapses, so the bit is gone. That's volatile. A ROM's bits aren't held by anything active; they are the wiring. Kill the power, restore it, and the answers are exactly where you left them. They were never "held" — they were built. That's non-volatile, and it's why your machine's start-up instructions live in ROM and not RAM. One more thing about that dot, because you're about to meet it wearing several different coats. The idea is only ever "this crossing is connected, or it isn't." Connected can be a diode, a blown fuse, a metal link, or a trapped charge that behaves like one. The decoder and the ORs never ask which. That's the point, not a complication: the picture survives every change of material.

RAM CELL · volatile a bit held in a feedback loop Vdd — power in 1 holding it alive ROM CELL · non-volatile the bit IS the wiring word line (the address) bit line (the read-out) 1 etched in metal — readable now click to etch (1) or erase (0) this ROM bit
power ON · RAM circulates its 1 · ROM has 1 etched in metal
Click the ROM crosspoint on the right to etch or erase its bit — that link is the memory.
Predict first: when you cut power, which cell forgets? The RAM is only holding its bit — a voltage racing around a loop. The ROM's bit is a piece of wire. Pull the plug and watch.
Two ways to remember a bit. The RAM cell on the left doesn't store its 1 so much as chase it — two inverters feed each other in a loop, and the value only exists as long as power keeps it racing around. The ROM cell on the right doesn't hold anything: its bit is the wiring, a metal link that's either bridged (1) or not (0). Hit cut power and the difference lands — the RAM goes dark and comes back as noise you must re-write, while the ROM's answer was never being held in the first place, so there was nothing to lose.

Of course, "fixed at the factory" is a nuisance if you're the one designing the table and you get it wrong. So the family grew a ladder of ever-more-forgiving ways to set those bits. PROM — program it once yourself, by blowing tiny fuses, and then it's permanent. EPROM — erasable, its cells cleared by a dose of ultraviolet light through a little quartz window on the chip. EEPROM — electrically erasable, rewritten in place with no window and no lamp, the ancestor of the flash memory in every phone and drive today. The read structure stays the same the whole way up; only the write-and-erase gets kinder.

THE LOOKUP TABLE · read the same way in all three READ path, unchanged: address → row decoder → cell → sense amp → bit WRITE · setting & clearing bit #3 a metal fuse in series with the cell word line +V bit line high current melts the link — once cell reads 1 PROM Programmable ROM write it: blow a fuse erase it: — impossible at once: n/a how long: permanent rewrites: 1, ever one-time link
fresh chip — bit #3 reads 1
The read row up top never changes — that's the whole point. Step PROM → EEPROM and watch only the writing get kinder: a fuse you blow once, then a charge UV can free, then a charge you flip electrically in place.
The ladder is all about the writing. Address a cell, drop it through a sense amp, read a bit — that path is identical in all three chips, so the top row never moves. What changes is how a bit gets put there and taken back. A PROM blows a metal fuse once — program it and it's frozen, no erase exists. An EPROM traps charge on a floating gate you can program electrically, but the only way to erase is to carry the chip to a UV lamp and flood the whole array through a quartz window. An EEPROM tunnels that same charge on and off through an ultra-thin oxide — electrically, one byte at a time, in place, in milliseconds. Widen that idea to a whole block and you've built flash. Step the ladder, program bit #3, then hit Erase — PROM won't even let you — and watch the granularity go from neverthe entire chipa single byte.

One last piece to make the display useful. The nibble reaching our decoder can't be whatever the bus happens to be doing this instant, or the bars would flicker through every intermediate value as the machine works. So we put a register in front of the display. On the clock edge it latches the byte the bus is carrying, and holds it steady while the display decoder reads its low nibble and the OR array draws it. It's the same edge-triggered register you already built — eight flip-flops on a shared clock — doing one dedicated job.

D inputs — click a bit to set the wires on the wires · 0 CLK Q outputs — the byte held in the register held · 0
wires ≠ register — hit CLOCK to store
Eight flip-flops, eight separate D wires, one clock. Change the D bits all you like — Q won’t budge until the single rising edge, and then all eight snap over together. That instant is when a whole number first gets stored.
Eight flip-flops = a register. Each of the eight D flip-flops watches its own input wire, but they all share a single clock line. Set the byte on the wires by clicking the D bits — nothing reaches the Q outputs yet. Press CLOCK and one rising edge makes all eight flip-flops sample at the very same instant, latching the whole byte at once. That shared-edge capture is the first device that stores a complete number: the register.

Latch a byte, and the display holds it up to the light until the next tick overwrites it. That's the machine finally showing its answer — the first of the two problems we opened with, solved. Now look back at the little bus computer from last chapter, and its hand-written timing program on the wall.

THE BUS · one wire, one talker hi-Z on the bus REG A 0 Aₒ Aᵢ REG B 3 Bₒ Bᵢ ADDER A + B 3 adder taps A & B directly Σₒ REG OUT 0 Oᵢ
beat · do this Aₒ
A→bus
Aᵢ
bus→A
Bₒ
B→bus
Bᵢ
bus→B
Σₒ
sum→bus
Oᵢ
bus→OUT
panel idle · 0 / 3
Nothing is asserted yet — every switch is down, the bus floats (hi-Z). Step through the score below.
Read it as sheet music for a wire: each row says who drives the bus and who latches it this beat. You are the machine right now — throwing the switches by hand.
A little computer, laid bare: registers A and B, an adder, and an OUT register, all hanging off one shared bus — and only one thing may talk on it at a time. Below sits the whole program: a timing table, one row per clock beat, marking which out-enable line drives the bus (•) and which load-enable line latches it. Step through it and you are the machine, throwing those switches by hand. Notice beats 1 and 2 are the identical row, thrown twice — repeated addition, counting up by three. Now press let it run: the score plays itself, no hand on the panel. Freeze those rows onto a turning drum and wire it to the switches and you've built the thing that punches the panel for you — a program counter and a control ROM. That machine is coming — but first the bytes have to become commands.

Look back at the timing table on the wall. Every control-line choice on it comes off a row, and the row is picked by the beat number: this beat asserts these lines, the next beat those. That's a fixed function of the beat — an answer for every case, decided in advance, by you. Beat number in, control lines out. That is an address and a word, and it is nothing else. So the chart on the wall is a table. A table with an answer for every case is a lookup table. Which is a ROM. Which you just built. The human at the control panel is about to be replaced by a pile of decode-and-OR gates — the same pile, pointed at the machine's own controls instead of at a display. That's the brain, and it's furniture you already own.

And that's Chapter 11. You turned "cleverness" into a table, and a table into silicon. A seven-segment display was seven boolean equations. Those equations were a decoder feeding an OR array. That array, frozen, was a ROM — the very RAM you knew, with the writing sawn off, keeping its bits through a power-cut because the bits are the wiring. The machine can show its answer now. But a display is a small use for a table that can map any situation to any response. Point that same table at the machine's own control lines and it runs itself. First, though, the bytes in RAM have to stop being mere numbers and start being commands. That reinterpretation is the next rung: where 00010010 stops meaning "eighteen" and starts meaning "load from address 2."

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Written by Ajai Raj